multiplication 1 to 12

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multiplication 1 to 12

---.../devicetree/bindings/media/i2c/tda1997x.txt | 179 1 book changed, 179 insertions( )create approach 100644 Documentation/devicetree/bindings/media/i2c/tda1997x.txt

diff --git a/Documentation/devicetree/bindings/media/i2c/tda1997x.txt b/Documentation/devicetree/bindings/media/i2c/tda1997x.txtnew book approach 100644index 0000000..269d7f0--- /dev/null b/Documentation/devicetree/bindings/media/i2c/tda1997x.txt@@ -0,0 1,179 @@ Device-Tree bindings for the NXP TDA1997x HDMI receiver The TDA19971/73 are HDMI video receivers. The TDA19971 Video anchorage achievement pins can be acclimated as follows: - RGB 8bit per blush (24 $.25 total): R[11:4] B[11:4] G[11:4] - YUV444 8bit per blush (24 $.25 total): Y[11:4] Cr[11:4] Cb[11:4] - YUV422 semi-planar 8bit per basic (16 $.25 total): Y[11:4] CbCr[11:4] - YUV422 semi-planar 10bit per basic (20 $.25 total): Y[11:2] CbCr[11:2] - YUV422 semi-planar 12bit per basic (24 $.25 total): - Y[11:0] CbCr[11:0] - YUV422 BT656 8bit per basic (8 $.25 total): YCbCr[11:4] (2-cycles) - YUV422 BT656 10bit per basic (10 $.25 total): YCbCr[11:2] (2-cycles) - YUV422 BT656 12bit per basic (12 $.25 total): YCbCr[11:0] (2-cycles) The TDA19973 Video anchorage achievement pins can be acclimated as follows: - RGB 12bit per blush (36 $.25 total): R[11:0] B[11:0] G[11:0] - YUV444 12bit per blush (36 $.25 total): Y[11:0] Cb[11:0] Cr[11:0] - YUV422 semi-planar 12bit per basic (24 $.25 total): Y[11:0] CbCr[11:0] - YUV422 BT656 12bit per basic (12 $.25 total): YCbCr[11:0] (2-cycles) The Video anchorage achievement pins are mapped via 4-bit 'pin groups' acceptance for a arrangement fo affiliation possibilities including swapping pin adjustment aural pin groups. The video_portcfg device-tree acreage consists of annals mapping pairs which map a chip-specific VP achievement annals to a 4-bit pin group. If the pin accumulation needs to be bit-swapped you can use the *_S pin-group defines. Required Properties: - accordant : - "nxp,tda19971" for the TDA19971 - "nxp,tda19973" for the TDA19973 - reg : I2C bondservant abode - interrupts : The arrest cardinal - DOVDD-supply : Agenda I/O accumulation - DVDD-supply : Agenda Core accumulation - AVDD-supply : Analog accumulation - nxp,vidout-portcfg : arrangement of pairs mapping VP achievement pins to pin groups. Optional Properties: - nxp,audout-format : DAI bus format: "i2s" or "spdif". - nxp,audout-width : amplitude of audio achievement abstracts bus (1-4). - nxp,audout-layout : abstracts blueprint (0=AP0 used, 1=AP0/AP1/AP2/AP3 used). - nxp,audout-mclk-fs : Multiplication agency amid beck amount and codec mclk. The accessory bulge charge accommodate one 'port' adolescent bulge for its agenda achievement video port, in accordance with the video interface bindings authentic in Documentation/devicetree/bindings/media/video-interfaces.txt. Optional Endpoint Properties: The afterward three backdrop are authentic in video-interfaces.txt and are accurate for antecedent endpoints only: - hsync-active: Horizontal synchronization polarity. Defaults to alive high. - vsync-active: Vertical synchronization polarity. Defaults to alive high. - data-active: Abstracts polarity. Defaults to alive high. Examples: - VP[15:0] affiliated to IMX6 CSI_DATA[19:4] for 16bit YUV422 16bit I2S layout0 with a 128*fs alarm (A_WS, AP0, A_CLK pins) hdmi-receiver@48 { accordant = "nxp,tda19971"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tda1997x>; reg = <0x48>; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; DOVDD-supply = <&reg_3p3v>; AVDD-supply = <&reg_1p8v>; DVDD-supply = <&reg_1p8v>; /* audio */ #sound-dai-cells = <0>; nxp,audout-format = "i2s"; nxp,audout-layout = <0>; nxp,audout-width = <16>; nxp,audout-mclk-fs = <128>; /* * The 8bpp YUV422 semi-planar approach outputs CbCr[11:4] * and Y[11:4] beyond 16bits in the aforementioned pixclk cycle. */ nxp,vidout-portcfg = /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; anchorage { tda1997x_to_ipu1_csi0_mux: endpoint { remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; bus-width = <16>; hsync-active = <1>; vsync-active = <1>; data-active = <1>; }; }; }; - VP[15:8] affiliated to IMX6 CSI_DATA[19:12] for 8bit BT656 16bit I2S layout0 with a 128*fs alarm (A_WS, AP0, A_CLK pins) hdmi-receiver@48 { accordant = "nxp,tda19971"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tda1997x>; reg = <0x48>; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; DOVDD-supply = <&reg_3p3v>; AVDD-supply = <&reg_1p8v>; DVDD-supply = <&reg_1p8v>; /* audio */ #sound-dai-cells = <0>; nxp,audout-format = "i2s"; nxp,audout-layout = <0>; nxp,audout-width = <16>; nxp,audout-mclk-fs = <128>; /* * The 8bpp YUV422 semi-planar approach outputs CbCr[11:4] * and Y[11:4] beyond 16bits in the aforementioned pixclk cycle. */ nxp,vidout-portcfg = /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; anchorage { tda1997x_to_ipu1_csi0_mux: endpoint { remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; bus-width = <16>; hsync-active = <1>; vsync-active = <1>; data-active = <1>; }; }; }; - VP[15:8] affiliated to IMX6 CSI_DATA[19:12] for 8bit BT656 16bit I2S layout0 with a 128*fs alarm (A_WS, AP0, A_CLK pins) hdmi-receiver@48 { accordant = "nxp,tda19971"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tda1997x>; reg = <0x48>; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; DOVDD-supply = <&reg_3p3v>; AVDD-supply = <&reg_1p8v>; DVDD-supply = <&reg_1p8v>; /* audio */ #sound-dai-cells = <0>; nxp,audout-format = "i2s"; nxp,audout-layout = <0>; nxp,audout-width = <16>; nxp,audout-mclk-fs = <128>; /* * The 8bpp BT656 approach outputs YCbCr[11:4] beyond 8bits over * 2 pixclk cycles. */ nxp,vidout-portcfg = /* YCbCr[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ < TDA1997X_VP24_V15_12 TDA1997X_R_CR_CBCR_11_8 >, /* YCbCr[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ < TDA1997X_VP24_V11_08 TDA1997X_R_CR_CBCR_7_4 >, anchorage { tda1997x_to_ipu1_csi0_mux: endpoint { remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; bus-width = <16>; hsync-active = <1>; vsync-active = <1>; data-active = <1>; }; }; }; -- 2.7.4

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